8-bit CPU: It's alive!
With updated version of Clock module complete, the only thing missing is the Control Logic. Let's build it to complete the CPU. Control logic The main idea of the Control logic is the same as in Ben Eater's CPU, with the difference that I'm using 28C64 EEPROMs. The address line usage is a bit different, through: 3 lines from microstep counter, allowing 8 microsteps in total 4 flags from Flags register 6 lines from Instruction Register, allowing 64 instruction opcodes This uses all 13 address lines, whole 8 KiB of the EEPROM, no room for byte-select bit, the contents of each ROM will have to be different. Notice, that I moved Flags bits to the middle of the input address. I like this layout better, because now all bytes for an instruction are grouped together. It also allows for easy expansion to 256 opcodes, the data layout will stay the same, I'll only need to replace EEPROMs with larger ones (28C256) and connect remaini